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TSM917 page 1 ? 2011 touchstone semiconductor, inc. all rights reserved. features ? second-source for max917 ? guaranteed to operate down to +1.8v ? ultra-low supply current: 750na ? internal 1.245v 1.5% reference ? input voltage range extends 200mv outside-the-rails ? no phase reversal for overdriven inputs ? push-pull output ? crowbar-current-free switching ? internal hysteresis for clean switching ? 5-pin sot23 and 8-pin soic packaging applications 2-cell battery monitoring/management medical instruments threshold detectors/discriminators sensing at ground or supply line ultra-low-power systems mobile communications telemetry and remote systems description the TSM917 nanopower analog comparator is electrically and form-factor identical to the max917 analog comparator. ideally suited for all 2-cell battery- management/monitoring applications, this 5-pin sot23 analog comparator guarantees +1.8v operation, draws very littl e supply current, and has a robust input stage that can tolerate input voltages beyond its power supply. the TSM917 draws 750na of supply current and includes an on-board 1.245v 1.5% reference. the TSM917?s push-push output drivers were designed to drive 8ma loads from one supply rail to the other supply rail. the ts m917 is also available in an 8-pin soic package. 1.8v nano p ower com p arato r with internal 1.245v reference typical application circuit the touchstone semiconducto r logo is a registered trademark of touchstone semiconductor, incorporated. www..net
TSM917 page 2 TSM917ds r1p0 rtfds absolute maximum ratings supply voltage (v cc to v ee ) ............................................ +6v voltage inputs (in+, in-, ref) .... (v ee - 0.3v) to (v cc + 0.3v) output voltage TSM917 ................................... (v ee - 0.3v) to (v cc + 0.3v) current into input pins ................................................ 20ma output curr ent ............................................................ 50ma output short-circuit duration ............................................ 10s continuous power dissipation (t a = +70c) 5-pin sc70 (derate 2.5mw/ c above +70c) ........ 200mw 8-pin soic (derate 5.88mw/c above +70c) ...... 471mw operating temper ature range ...................... - 40c to +85c junction temper ature ................................................ +150c storage temperature rang e ....................... -65c to +150c lead temperature (sol dering, 10s ) ............................... +300 electrical and thermal stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the op erational sections of the specifications is not implied. ex posure to any absolute maximum rating conditions for extended periods may affect device reliability and lifetime. package/ordering information order number part marking carrier quantity order number part marking carrier quantity TSM917euk+t taaa tape & reel 3000 TSM917esa+ ts917e tube 97 TSM917esa+t tape & reel 2500 lead-free program: touchstone semiconductor supp lies only lead-free packaging. consult touchstone semiconductor for products s pecified with wider operating temperature ranges.
TSM917 TSM917ds r1p0 page 3 rtfds electrical characteristics v cc = +5v, v ee = 0v, v in+ = v ref , t a = -40c to +85c, unless otherwise noted. typical values are at t a = +25c. see note 1. parameter symbol conditions min typ max units supply voltage range v cc inferred from the psrr test t a = +25c 1.8 5.5 v supply current i cc v cc = 1.6v t a = +25c 0.75 a v cc = 5v t a = +25c 0.80 1.30 t a = t min to t max 1.60 in+ voltage range v in+ inferred from the output swing test v ee - 0.2 v cc + 0.2 v input offset voltage v os (note 2) t a = +25c 1 5 mv t a = t min to t max 10 input-referred hysteresis v hb (note 3) 4 mv input bias current i b t a = +25c 0.15 1 na t a = t min to t max 2 power-supply rejection ratio psrr v cc = 1.8v to 5.5v 0.1 1 mv/v output-voltage swing high v cc - v oh v cc = 5v, i source = 8ma t a = +25c 190 400 mv t a = t min to t max 500 v cc = 1.8v, i source = 1ma t a = +25c 55 200 t a = t min to t max 300 output-voltage swing low v ol v cc = 5v, i sink = 8ma t a = +25c 190 400 mv t a = t min to t max 500 v cc = 1.8v, i sink = 1ma t a = +25c 55 200 t a = t min to t max 300 output short-circuit current i sc sourcing, v o = v ee v cc = 5v 95 ma v cc = 1.8v 8 sinking, v o = v cc v cc = 5v 98 v cc = 1.8v 10 high-to-low propagation delay (note 4) t pd - v cc = 1.8v 17 s v cc = 5v 22 low-to-high propagation delay (note 4) t pd+ v cc = 1.8v 30 s v cc = 5v 95 rise time t rise c l = 15pf 6 s fall time t fall c l = 15pf 4 s power-up time t on 1.2 ms reference voltage v ref t a = +25c 1.227 1.245 1.263 v t a = t min to t max 1.200 1.290 reference voltage temperature coefficient tcv ref 95 ppm/c reference output voltage noise e n bw = 10hz to 100khz 600 v rms bw = 10hz to 100khz, c ref = 1nf 215 reference line regulation ? v ref / ? v cc v cc = 1.8v to 5.5v 0.1 mv/v reference load regulation ? v ref / ? i out ? i out = 10na 0.2 mv/na note 1: all specifications are 100% tested at t a = +25c. specification lim its over temperature (t a = t min to t max ) are guaranteed by design, not production tested. note 2: v os is defined as the center of the hysteresis band at the input. note 3: the hysteresis-related trip points are defi ned by the edges of the hysteresis band, meas ured with respect to the center of the hysteresis band (i.e., v os ) (see figure 2). note 4: specified with an input overdrive (v overdrive ) of 100mv, and load capacitance of c l = 15pf. v overdrive is defined above and beyond the offset voltage and hysteresis of the comparator input. for the TSM917, reference voltage error should also be added.
TSM917 page 4 TSM917ds r1p0 rtfds supply current vs output transition frequency supply current vs supply voltage and temperature supply curent - a supply voltage - volt supply current vs temperature supply current - na output transition frequency - hz temperature - c supply curent - a v cc =+1.8v 0.5 0.7 0.9 1.1 1.3 output voltage low vs. sink current v ol - mv sink current- ma output voltage low vs. sink current and tem p erature source current- ma v cc ? v oh - v 0 50 100 150 200 250 300 200 100 0 0.5 0.4 0.2 0 v cc =+5v v cc =+3v v cc =+1.8v v cc =+5v v cc =+3v t a = +25c t a = +85c t a = -40c t a = +25c t a = +85c t a = -40c v cc =+1.8v v cc =+5v v cc =+3v v ol - mv v cc =+1.8v v cc =+5v v cc =+3v output voltage high vs source current 2.5 4.5 1.5 5.5 3.5 -40 -15 10 35 85 60 10 100 10k 1k 4 8 0 10 6 2 sink current- ma typical performance characteristics v cc = +5v; v ee = 0v; c l = 15pf; v overdrive = 100mv; t a = +25 c, unless otherwise noted. 0.4 0.6 0.7 1 0.5 0.8 1.1 0.9 5 10 20 30 0 15 35 25 1 12 14 16 4 8 0 10 6 2 12 14 16 0.3 0.1 4 8 0 10 6 2 12 14 16 18 20
TSM917 TSM917ds r1p0 page 5 rtfds reference voltage vs temperature hysteresis voltage vs temperature offset voltage vs temperature short-circuit source current vs temperature short-circuit sink current vs temperature output voltage high vs source current and temperature sink current- ma source current- ma source current- ma 0 8 12 16 4 0.4 0.3 0.2 0 0.1 120 100 80 40 60 120 100 60 80 -40 -15 35 60 85 10 1.4 1.6 1.8 2.0 2.2 2.4 1.246 1.244 1.243 1.241 t a = +25c t a = +85c t a = -40c v cc ? v oh - v v cc =+1.8v v cc =+5v v cc =+3v v cc =+1.8v v cc =+5v v cc =+3v temperature - c temperature - c 140 v os - mv temperature - c v hb - mv temperature - c reference voltage - v typical performance characteristics v cc = +5v; v ee = 0v; c l = 15pf; v overdrive = 100mv; t a = +25 c, unless otherwise noted. 20 0.5 0.6 -40 -15 35 60 85 10 -40 -15 35 60 85 10 -40 -15 35 60 85 10 temperature - c -40 -15 35 60 85 10 20 0 40 0 20 2.6 5.5 5 4 4.5 3.5 2.5 3 1.242 1.245 v cc =+1.8v, 3v v cc =+5v v cc =+1.8v v cc =+5v v cc =+3v
TSM917 page 6 TSM917ds r1p0 rtfds reference voltage - v supply voltage - volt 2 4 6 8 10 5 10 15 20 25 30 60 40 20 0 0.01 0.1 10 100 1000 1 reference voltage - v reference voltage vs supply voltage source current- na v cc =+1.8v v cc =+5v v cc =+3v sink current- na v cc =+1.8v v cc =+5v v cc =+3v reference voltage vs reference sink current reference voltage vs reference source current reference voltage - v 1.246 1.241 1.246 1.244 1.242 1.239 1.244 1.243 v cc =+1.8v v cc =+5v v cc =+3v v cc =+1.8v v cc =+5v v cc =+3v v cc =+1.8v v cc =+5v v cc =+3v temperature - c capacitive load - nf temperature - c t pd- - s t pd- - s t pd+ - s propagation delay (t pd- ) vs temperature propagation delay (t pd- ) vs capacitive load propagation delay (t pd+ ) vs temperature typical performance characteristics v cc = +5v; v ee = 0v; c l = 15pf; v overdrive = 100mv; t a = +25 c, unless otherwise noted. 2.5 4.5 1.5 5.5 3.5 -40 -15 10 35 85 60 -40 -15 10 35 85 60 1.245 1.243 1.240 1.241 1.242 1.245 0 2 4 6 8 10 0 1.2515 1.2495 1.2475 1.2445 1.2505 1.2485 1.2455 1.2465 1.2435 0 140 120 100 80 80 60 40 0 100 20
TSM917 TSM917ds r1p0 page 7 rtfds propagation delay (t pd+ ) at v cc = +5v propagation delay (t pd- ) at v cc = +3v propagation delay (t pd- ) at v cc = +5v 0 10 20 30 50 70 50 10 20 100 80 60 v cc =+1.8v v cc =+5v v cc =+3v v cc =+1.8v v cc =+5v v cc =+3v v cc =+1.8v v cc =+5v v cc =+3v input overdrive - mv input overdrive - mv capacitive load - nf t pd- - s t pd+ - s t pd+ - s propagation delay (t pd- ) vs input overdrive propagation delay (t pd+ ) vs capacitive load propagation delay (t pd+ ) vs input overdrive 20s/div input output input output input output 20s/div 20s/div typical performance characteristics v cc = +5v; v ee = 0v; c l = 15pf; v overdrive = 100mv; t a = +25 c, unless otherwise noted. 0.01 0.1 10 100 1000 1 80 60 40 0 120 100 20 60 40 30 40 80 0 10 20 30 50 40 40 20 0 120
TSM917 page 8 TSM917ds r1p0 rtfds propagation delay (t pd- ) at v cc = +1.8v propagation delay (t pd+ ) at v cc = +3v 1khz transient response at v cc = +5v power-up/power-down transient response propagation delay (t pd+ ) at v cc = +1.8v 10khz transient response at v cc = +1.8v input output 20s/div input output input output 20s/div 20s/div input output input output 20s/div 200s/div input output 0.2s/div typical performance characteristics v cc = +5v; v ee = 0v; c l = 15pf; v overdrive = 100mv; t a = +25 c, unless otherwise noted.
TSM917 TSM917ds r1p0 page 9 rtfds pin functions TSM917 name function 5-pin sot23 8-pin soic 1 6 out comparator output 2 4 vee negative supply voltage 3 3 in+ comparator noninverting input 4 2 ref 1.245v reference output and comparator inverting input 5 7 vcc positive supply voltage ? ? in- comparator inverting input ? 1, 5, 8 nc no connection. not internally connected. block diagrams description of operation guaranteed to operate from +1.8v supplies, the TSM917 analog comparator only draws 750na supply current, features a robust input stage that can tolerate input voltages 200mv beyond the power supply rails, and includes an on-board +1.245v 1.5% voltage reference. to insure clean output switching behavior, the TSM917 features 4mv internal hysteresis. the TSM917?s push-pull output drivers were designed to minimize supply-current surges while driving 8ma loads with rail-to-rail output swings. input stage circuitry the robust design of the analog comparator?s input stage can accommodate any differential input voltage from v ee - 0.2v to v cc + 0.2v. input bias currents are typically 0.15na so long as the applied input voltage remains between the supply rails. esd protection diodes - connected internally to the supply rails - protect comparator inputs against overvoltage conditions. however, if the applied input voltage exceeds either or both supply rails, an increase in input current can occur when these esd protection diodes start to conduct.
TSM917 page 10 TSM917ds r1p0 rtfds output stage circuitry many conventional analog comparators can draw orders of magnitude higher supply current when switching. because of this behavior, additional power supply bypass capacitance may be required to provide additional charge storage during switching. the design of the TSM917?s rail-to-rail output stage implements a technique that virtually eliminates supply-current surges when output transitions occur. as shown on page 4 of the typical operating characteristic s, the supply-current change as a function of output transition frequency exhibited by this analog comparator family is very small. material benefits of this attribute to battery- power applications are the increase in operating time and in reducing the si ze of power-supply filter capacitors. TSM917?s internal +1.245v v ref the TSM917?s internal +1.245v voltage reference exhibits a typical tem perature coefficient of 95ppm/c over the full -40c to +85c temperature range. an equivalent circui t for the reference section is illustrated in figure 1. since the output impedance of the voltage reference is typically 200k ? , its output can be bypassed with a low-leakage capacitor and is stable for any capacitive load. an external buffer ? such as the ts1001 ? can be used to buffer the voltage reference output fo r higher output current drive or to reduce reference output impedance. applications information low-voltage, low-power operation because it was designed sp ecifically for any low- power, battery-operated application, the TSM917 analog comparator is an excellent choice. under nominal conditions, approximate operating times for this analog comparator is illustrated in table 1 for a number of battery types and their corresponding charge capacities. internal hysteresis as a result of circuit noise or unintended parasitic feedback, many analog compar ators often break into oscillation within their li near region of operation especially when the applied differential input voltage approaches 0v (zero volt). externally-introduced hysteresis is a well-established technique to stabilizing analog comparator behavior and requires external components. as shown in figure 2, adding comparator hysteresis creates two trip points: v thr (for the rising input voltage) and v thf (for the falling input voltage). the hysteresis band (v hb ) is defined as the voltage difference between the two trip points. when a comparator?s input voltages are equal, hysteresis effectively forces one comparator input to figure 1 : TSM917?s internal v ref output equivalent circuit table 1: battery applications using the TSM917 battery type rechargeable v fresh (v) v end-of-life (v) capacity, aa size (ma-h) TSM917 operating time (hrs) alkaline (2 cells) no 3.0 1.8 2000 2.5 x 10 6 nickel-cadmium (2 cells) yes 2.4 1.8 750 937,500 lithium-ion (1 cell) yes 3.5 2.7 1000 1.25 x 10 6 nickel-metal- hydride (2 cells) yes 2.4 1.8 1000 1.25 x 10 6
TSM917 TSM917ds r1p0 page 11 rtfds move quickly past the other input, moving the input out of the region where osc illation occurs. figure 2 illustrates the case in which an in- input is a fixed voltage and an in+ is varied. if the input signals were reversed, the figure would be the same with an inverted output. to save co st and external pcb area, an internal 4mv hysteresis circuit was added to the TSM917. adding hysteresis to the TSM917 the TSM917 exhibits an internal hysteresis band (v hb ) of 4mv. additional hysteresis can be generated with three external resistors using positive feedbackas shown in figure 3. unfortunately, this method also reduces the hysteresis response time. the design procedure below can be used to calculate resistor values. 1) setting r2. as the leakage current at the in pin is under 2na, the current through r2 should be at least 0.2 a to minimize offset voltage errors caused by the input leakage current. the current through r2 at the trip point is (v ref - v out )/r2. in solving for r2, there are two formulas ? one each for the two possible output states: r2 = v ref /i r2 or r2 = (v cc - v ref )/i r2 from the results of the two formulae, the smaller of the two result ing resistor values is chosen. for example, when using the TSM917 (v ref = 1.245v) at a v cc = 3.3v and if i r2 = 0.2 a is chosen, then the formulae above produce two resistor values: 6.23m ? and 10.24m ? - the 6.2m ? standard value for r2 is selected. 2) next, the desired hysteresis band (v hysb ) is set. in this example, v hysb is set to 100mv. 3) resistor r1 is calculated according to the following equation: r1 = r2 x (v hb /v cc ) and substituting the values selected in 1) and 2) above yields: r1 = 6.2m ? x (100mv/3.3v) = 187.88k ? the 187k ? standard value for r1 is selected. 4) the trip point for v in rising (v thr ) is chosen such that v thr > v ref x (r1 + r2)/r2 (where v thf is the trip point for v in falling). this is the threshold voltage at which the comparator switches its output from low to high as v in rises above the trip point. in this example, v thr is set to 3v. 5) with the v thr from step 4 above, resistor r3 is then computed as follows: r3 = 1/[v thr /(v ref x r1) - (1/r1) - (1/r2)] r3 = 1/[3v/(1.245v x 187k ? ) - (1/187k ? ) - (1/6.2m ? )] = 135.56k ? in this example, a 137k ? , 1% standard value resistor is selected for r3. figure 3 : using three resistors introduces a dditional hysteresis in the TSM917. figure 2 : TSM917?s threshold hysteresis band
TSM917 page 12 TSM917ds r1p0 rtfds 6) the trip voltages and hysteresis band should be verified as follows: for v in rising: v thr = v ref x r1 x [(1/r1) + (1 / r2) + (1 / r3)] = 3v for v in falling: v thf = v thr - (r1 x v cc /r2) = 2.9v and hysteresis band = v thr ? v thf = 100mv pc board layout and power-supply bypassing while power-supply bypass capacitors are not typically required, it is always good engineering practice to use 0.1uf bypass capacitors close to the device?s power supply pins when the power supply impedance is high, the power supply leads are long, or there is excessive noise on the power supply traces. to reduce stray capacitance, it is also good engineering practice to make signal trace lengths as short as possible. also recommended are a ground plane and surface mount resistors and capacitors.
TSM917 TSM917ds r1p0 page 13 rtfds package outline drawing 5-pin sot23 package outline drawing (n.b., drawings are not to scale)
TSM917 page 14 touchstone semiconductor, inc. TSM917ds r1p0 630 alder drive, milpitas, ca 95035 rtfds +1 (408) 215 - 1220 ? www.touchstonesemi.com package outline drawing 8-pin soic package outline drawing (n.b., drawings are not to scale) information furnished by touchstone semic onductor is believed to be accurate and reli able. however, touchstone semiconductor do es not assume any responsibility for its use nor for any infringements of patents or other rights of third parties that may result fro m its use, and all information provided by touchstone semic onductor and its suppliers is provided on an as is basis, without warranty of any kind. touchstone semiconductor reserves the right to change product specifications and pr oduct descriptions at any time without any a dvance notice. no license is granted by implication or otherwise unde r any patent or patent rights of touchstone semiconductor. touchs tone semiconductor assumes no liability for applic ations assistance or customer product des ign. customers are responsible for their products and applications using touchstone semiconductor components. to minimize the risk a ssociated with customer products and applications , customers should provide adequate design and operating safeguards . trademarks and registered trademarks are the property of the i r

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